The present invention relates to an oscillating signal generator, a phase-lock loop circuit using the oscillating signal generator and a control method of the oscillating signal generator, and more particularly to a phase-lock loop circuit having a low KVCO and a large tuning range, and the control method thereof.
In the field of phase-lock loop (PLL) circuit, a PLL circuit with a low KVCO (voltage-controlled oscillator (VCO) gain) has several benefits. For example, the first advantage is the jitter induced from the noise of the tuning signal of the VCO can be minimized. The second advantage is the PLL circuit has smaller chip size because the size of the loop filter capacitor is saved for a given bandwidth. However, the major problem associated with low KVCO PLL circuit is the small frequency adjusting range. This situation is even worse in advanced technology where low voltage is employed.
In addition, for the PLL circuit that needs wide continuous frequency sweeping range, the above problem is even worse. For example, in the CAV (Constant Angular Velocity) write case for a DVD system, the disc is rotated in constant angular velocity while the linear velocity will be proportional to radius position of PUH (Pick up head). The write clock frequency will be needed to “continuously sweep” from PUH in its inner position to outer position. The ratio for maximum and minimum frequency will be around 2.5×. For PLL circuit to cover such a wide range, the KVCO must be large. However, the conventional method used to lower the KVCO can only solve the problem arise from the process variation. Therefore, providing a PLL circuit with a low KVCO but larger tuning range is an urgent problem in this field.